劉宗德教授的著作列表 - Publication List of Tsung-Te Liu

Publication List of 劉宗德 Tsung-Te Liu

Journal articles & book chapters:

  1. T. -H. Wu, C. Shu and T. -T. Liu, “An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 11, pp. 5178-5186, Nov. 2024
  2. B. -C. Wu, W. -T. Chen and T. -T. Liu, “An Error-Resilient RISC-V Microprocessor With a Fully Integrated DC–DC Voltage Regulator for Near-Threshold Operation in 28-nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 58, no. 11, pp. 3275-3285, Nov. 2023
  3. H. -C. Chang, T. Wang, C. -A. Liao and T. -T. Liu, “A Low-Power PPG Processor for Real-Time Biometric Identification and Heart Rate Estimation,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 10, pp. 3932-3936, Oct. 2023
  4. C. -Y. Yao, T. -Y. Wu, H. -C. Liang, Y. -K. Chen and T. -T. Liu, “A Fully Bit-Flexible Computation in Memory Macro Using Multi-Functional Computing Bit Cell and Embedded Input Sparsity Sensing,” IEEE Journal of Solid-State Circuits, vol. 58, no. 5, pp. 1487-1495, May 2023
  5. R. -X. Zheng, Y. -C. Ko and T. -T. Liu, “A Speculative Computation Approach for Energy-Efficient Deep-Neural-Network,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 3, pp. 795-806, Mar. 2023
  6. S. -H. Yang and T. -T. Liu, “A Highly Stable Physically Unclonable Function Using Algorithm-Based Mismatch Hardening Technique in 28-nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 1, pp. 280-289, Jan. 2023
  7. Y. -L. Liou, J. -Y. Hsu, C. -S. Chen, A. H. Liu, H. -Y. Lee and T. -T. Liu, “A Fully Integrated 1.7mW Attention-Based Automatic Speech Recognition Processor,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 4178-4182, Oct. 2022
  8. S. -H. Cheng, M. -H. Lee, B. -C. Wu and T. -T. Liu, “A Lightweight Power Side-Channel Attack Protection Technique With Minimized Overheads Using On-Demand Current Equalizer,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 4008-4012, Oct. 2022
  9. Y. -C. Lai, C. -Y. Yao, S. -H. Yang, Y. -W. Wu and T. -T. Liu, “A Robust Area-Efficient Physically Unclonable Function With High Machine Learning Attack Resilience in 28-nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 1, pp. 347-355, Jan. 2022
  10. Y. -T. Hsu, C. -Y. Yao, T. -Y. Wu, T. -D. Chiueh and T. -T. Liu, “A High-Throughput Energy–Area-Efficient Computing-in-Memory SRAM Using Unified Charge-Processing Network,” IEEE Solid-State Circuits Letters, vol. 4, pp. 146-149, 2021
  11. C. -H. Lu, Y. -T. Hsu, B. -C. Wu, and T. -T. Liu, “A 270-mV 6T SRAM Using Row-Based Dual-Phase VDD Control in 28-nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 12, pp. 4774-4783, Dec. 2020
  12. L. -Y. Yeh, P. -J. Chen, C. -C. Pai and T. -T. Liu, “An Energy-Efficient Dual-Field Elliptic Curve Cryptography Processor for Internet of Things Applications,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 9, pp. 1614-1618, Sept. 2020
  13. C. -Y. Hong and T. -T. Liu, “A Variation-Resilient Microprocessor With a Two-Level Timing Error Detection and Correction System in 28-nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 55, no. 8, pp. 2285-2294, Aug. 2020
  14. Z. -Y. Liang, H. -H. Wei and T. -T. Liu, “A Wide-Range Variation-Resilient Physically Unclonable Function in 28 nm,” IEEE Journal of Solid-State Circuits, vol. 55, no. 3, pp. 817-825, Mar. 2020
  15. F. Y. Xie, B. C. Wu, and T.-T. Liu, “A Ripple Reduction Method for Switched-Capacitor DC-DC Voltage Converter Using Fully Digital Resistance Modulation,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 9, pp. 3631-3641, Sept. 2019
  16. S. Y. Chang, B. C. Wu, Y. L. Liou, R. X. Zheng, P. L. Lee, T. D. Chiueh, and T.-T. Liu, “An Ultra-Low-Power Dual-Mode Automatic Sleep Staging Processor Using Neural-Network-Based Decision Tree,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 9, pp. 3504-3516, Sept. 2019
  17. T.-S. Chen, D.-Y. Lee, T.-T. Liu, and A.-Y. Wu, “Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol.63, no.10, pp.1661-1672, Oct. 2016
  18. T.-T. Liu and J. Rabaey, “A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression,” IEEE Journal of Solid-State Circuits, vol.48, no.4, pp.897-906, Apr. 2013
  19. D. Marković, C. C. Wang, L. Alarcón, T.-T. Liu , and J. Rabaey, “Ultra-Low Power Design in Near-Threshold Regime,” Proceedings of the IEEE, vol.98, no.2, pp.237–252, Feb. 2010
  20. T.-T. Liu, L. Alarcón, M. Pierson, and J. Rabaey, “Asynchronous Computing in Sense Amplifier-based Pass Transistor Logic,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.17, no.7, pp.883-892, Jul. 2009
  21. L. Alarcon, T.-T. Liu, M. Pierson, and J. Rabaey, “Exploring Very Low-energy Logic: A Case Study,” Journal of Low Power Electronics, vol.3, no.3, pp.223-233, Dec. 2007

Conference & proceeding papers:

  1. C.-M. Huang, T.-T. Liu, and T-D. Chiueh, “An Energy-Efficient Resilient Flip-Flop Circuit with Built-In Timing-Error Detection and Correction,” IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT’15), pp.1-4, Apr. 2015
  2. J. Ryckaert, P. Raghavan, R. Baert, M.G. Bardon, M. Dusa, A. Mallik, S. Sakhare, B. Vandewalle, P. Wambacq, B. Chava, K. Croes, M. Dehan, D. Jang, P. Leray, T.-T. Liu, K. Miyaguchi, B. Parvais, P. Schuddinck, P. Weemaes, A. Mercha, J. Bommels, N. Horiguch, “Design Technology Co-optimization for N10,” IEEE Proceedings of the Custom Integrated Circuits Conference (CICC’14), pp.1-8, Sept. 2014
  3. A. Mallik, P. Zuber, T.-T. Liu, B. Chava, B. Ballal, P. Royer, K. Croes, B. Rogier, R. Julien, A. Mercha, M. Badaroglu, and D. Verkest, “TEASE: A Systematic Analysis Framework for Early Evaluation of FinFET-based Advanced Technology Nodes,” 50th ACM/EDAC/IEEE Design Automation Conference (DAC’13), pp. 1-6, Jun. 2013
  4. J. Richmond, M. John, L. Alarcón, W. Zhou, W. Li, T.-T. Liu, M. Alioto, S. Sanders, and J. Rabaey, “Active RFID: Perpetual Wireless Communications Platform for Sensors,” Proceeding of the 38th European Solid-State Circuits Conference, 2012. (ESSCIRC’12), pp. 434-437, Sept. 2012
  5. T.-T. Liu and J. Rabaey, “A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression,” IEEE Symposium on VLSI Circuits (VLSIC’12), pp. 158-159, Jun. 2012
  6. T.-T. Liu and J. Rabaey, “Statistical Analysis and Optimization of Asynchronous Circuits,” 18th IEEE International Symposium on Asynchronous Circuits and Systems, (ASYNC'12), pp. 1-8, May 2012
  7. L. Alarcón, T.-T. Liu, and J. Rabaey, “A Low-Leakage Parallel CRC Generator for Ultra-Low Power Applications,” Proceedings of 2011 IEEE International Symposium on Circuits and Systems (ISCAS’11), pp.2063-2066, May 2011
  8. T.-T. Liu, L. Alarcón, M. Pierson, and J. Rabaey, “Asynchronous Computing in Sense Amplifier-based Pass Transistor Logic,” 14th IEEE International Symposium on Asynchronous Circuits and Systems, (ASYNC '08), pp.105-115, Apr. 2008