呂良鴻特聘教授的個人資料 - Profile of Liang-Hung Lu

呂良鴻 Liang-Hung Lu

國立臺灣大學電機工程學系 特聘教授
Distinguished Professor, Department of Electrical Engineering, National Taiwan University

主要研究領域:

射頻/微波積體電路設計、混合訊號積體電路設計

Major Research Areas:

RF/Microwave Integrated Circuit Design, Mixed-Signal Integrated Circuit Design

研究領域摘要:

  1. 射頻前端積體電路

  2. 寬頻/高速混合訊號積體電路

  3. 射頻內建自我測試技術

Research Summary:

  1. RF front-end integrated circuits
  2. Broadband and high-speed transmitters
  3. RF calibration and built-in self-test (BIST) techniques

 

Photo of Liang-Hung Lu

代表性著作 Selected Publication

  1. H.-H. Hsieh and L.-H. Lu, “A 63-GHz voltage-controlled oscillator in 0.18-um CMOS,” Symposium on VLSI Circuits, Kyoto, Japan, Jun. 2007
  2. H.-H. Hsieh C.-T. Lu and L.-H. Lu, “A 0.5-V 1.9-GHz low-power phase-locked loop in 0.18-um CMOS,” Symposium on VLSI Circuits, Kyoto, Japan, Jun. 2007
  3. H.-Y. Huang, J.-C. Chien and L.-H. Lu, “A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback,” IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1111-1120, May 2007
  4. H.-H. Hsieh and L.-H. Lu, “A high-performance CMOS voltage-controlled oscillator for ultra-low-voltage operations,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 3, pp. 467-473, Mar. 2007
  5. J.-C. Chien and L.-H. Lu, “40GHz wide-locking-range regenerative frequency divider and low-phase-noise balanced VCO in 0.18um CMOS,” IEEE International Solid-State Circuits Conference (ISSCC 2007), San Francisco, CA, USA, Feb. 2007
  6. J.-C. Chien and L.-H. Lu, “40Gb/s high-gain distributed amplifiers with cascaded gain stages in 0.18um CMOS,” IEEE International Solid-State Circuits Conference (ISSCC 2007), San Francisco, CA, USA, Feb. 2007
  7. Y.-H. Peng and L.-H. Lu, “A 16-GHz triple-modulus phase-switching prescaler and its application to a 15-GHz frequency synthesizer in 0.18-um CMOS,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 1, pp. 44-51, Jan. 2007